Prof. Yamasaki presented at The International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA) 2014 in Hawaii.

Nobuyuki Yamasaki, “Co-Design of Dependable Responsive Multithreaded Processor II (DRMTP-II) SoC and SiP,” The International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA) 2014, March 2014.